The present invention relates to integrated circuit memory devices and, more particularly, to integrated circuit memory devices with error detection capabilities.
Generally, semiconductor memory devices are classified into random access memories (RAMs) and read only memories (ROMs). RAMs are volatile memory devices that lose their stored data when their power supplies are interrupted, while the ROMS are non-volatile memory devices that can hold their stored data even when their power supplies are interrupted. RAMs include dynamic RAM (DRAM) and static RAM (SRAM), and ROMs include programmable ROM (PROM), erasable PROM (EPROM), electrically EPROM (EEPROM), and flash memory.
Typically, flash memory devices are classified into NAND flash memory devices and NOR flash memory devices. A typical NAND flash memory device is divided into a plurality of blocks, each having a plurality of pages. Each page includes a plurality of memory cells sharing a wordline. For example, each of the blocks may have 16, 32 or 64 pages, each having 512 or 2048 bytes of memory cells. A typical NAND flash memory device performs read and write (or program) operations for each page and performs an erase operation for each block.
A NAND flash memory device may support a copyback operation as well as read/write/erase operations. In a copyback operation, data stored in a first page (or source page) is copied to a second page (or target page). For a copyback operation, data stored in a source page typically is temporarily stored in a page buffer, and the temporarily stored data is re-stored in a target page without being read to the outside of the memory device. Use of the copyback operation makes it possible to omit reading out data of a source page and re-loading the data externally, which can enhance an operating speed of the NAND flash memory device.
However, a one-bit error may occur when reading data from a source page, and a one-bit error may additionally occur when programming (writing) the data in a target page. Hence, a 2-bit error may occur in copyback operation. In a typical NAND flash memory device, a memory controller may be capable of correcting only one-bit errors for a page. Consequently, if a 2-bit error occurs for a page during a copyback operation, it may not be possible to conduct successful error correction.